Eric B. Olsen is a digital design engineer specializing in FPGA architecture, systolic matrix multiplication, and high-throughput compute engines. He pioneered systolic matrix-multiplier designs across high-end FPGA families and invented forward-error-correcting arithmetic in the residue number system. His experience spans end-to-end delivery of cutting-edge systems—from FPGA accelerator pipelines and memory-centric data movers to safety-critical medical devices and neural brain implants. Eric is an inventor with over twenty patents and has authored two IEEE papers. At MemComputing, he focuses on advanced FPGA/DSP compute architectures and memory-centric accelerators.